may 2010 doc id 17500 rev 1 1/9 9 lcp12 protection ic fo r ringing slics features protection ic recommended for ringing slics wide firing voltage range: -120 v to +120 v low gate triggering current: i g = 5 ma max peak pulse current: i pp = 45 a (10/1000 s) holding current: i h = 150 ma min applications dual battery supply voltage slics ? negative battery supply configuration ? negative and positive battery supply configuration central office (co) private branch exchange (pbx) digital loop carrier (dlc) digital subscriber lin e access multiplexer (dslam) fiber in the loop (fitl) wireless local loop (wll) hybrid fiber coax (hfc) isdn terminal adapter cable modem description the lcp12 has been developed to protect slics operating on both negative and positive battery supplies, as well as high voltage slics. it provides crowbar mode protection for both tip and ring lines. the surge suppression is assumed for each wire by two thyristor structures, one dedicated to positive surges the second one for negative surges. both positive and negative threshold levels are programmable by two gates (gn and gp). the use of transistors decreases the battery currents during surge suppression. figure 1. functional diagram figure 2. pin-out configuration lcp12 can be used to help equipment to meet various standards such as ul1950, iec 60950 / csac22.2, ul1459 and tia-968-a (formerly fcc part68). a trisil? meets ul94 v0. (trisils are ul497b approved - file: e136224). tm: trisil is a trademark of stmicroelectronics so-8 wide lcp12 gn tip gp gnd ring gnd tip ring g p g n nc nc gnd www.st.com
characteristics lcp12 2/9 doc id 17500 rev 1 1 characteristics table 1. compliant with the following standards standard peak surge voltag e (v) voltage waveform required peak current (a) current waveform minimum series resistor to meet standard ( ) gr-1089 core first level 2500 1000 2/10 s 10/1000 s 500 100 2/10 s 10/1000 s 12 13 gr-1089 core second level 5000 2/10 s 500 2/10 s 24 gr-1089 core intra-building 1500 2/10 s 100 2/10 s 0 itu-t-k20/k21 6000 4000 1500 10/700 s 150 100 37.5 5/310 s 40 14 0 itu-t-k20 (iec61000-4-2) 8000 15000 1/60 ns esd contact discharge esd air discharge 0 0 vde0433 4000 2000 10/700 s 100 50 5/310 s 14 0 vde0878 4000 2000 1.2/50 s 100 50 1/20 s 0 0 iec61000-4-5 4000 4000 10/700 s 1.2/50 s 100 100 5/310 s 8/20 s 14 0 tia-968-a (formerly fcc part 68) type a 1500 800 10/160 s 10/560 s 200 100 10/160 s 10/560 s 20 15 tia-968-a (formerly fcc part 68) type b 1000 9/720 s 25 5/320 s 0 table 2. absolute maximum ratings (t amb = 25 c) symbol parameter value unit i pp peak pulse current 10/1000 s 5/310 s 2/10s 45 75 150 a i tsm non repetitive surge peak on-state current (f = 50 hz) i tsm value specified for each line i tsm value can be applied on both lines at the same time (gnd capability is twice the line i tsm ) t p = 0.2 s t p = 1 s t p = 15 min 11 7.5 3 a v gn max v gp max maximum negative battery voltage range maximum positive battery voltage range -120 to 0 0 to +120 v t op operating temperature range -40 to +125 c t stg storage temperature range -55 to +150 c t l lead solder temperature (10 s duration) 260 c
lcp12 characteristics doc id 17500 rev 1 3/9 figure 3. pulse waveform 100 50 %i pp t t r p 0 t table 3. thermal resistance symbol parameter value unit r th(j-a) junction to ambient 150 c/w table 4. parameters related to the negative suppressor symbol parameter test conditions min. max. unit i gn negative gate trigger current v gn/gnd = -60 v measured at 50 hz 5ma i h- holding current (see figure 4 ) go-no go test, v gn = -60 v 150 ma v dgl- dynamic switching voltage gn / line (1) v gn/gnd = -60 v v 10/700 s 1.2/50 s 2 kv 2 kv r p = 25 r p = 25 i pp = 30 a i pp = 30 a 8 12 1. the v dgl value is the difference between the peak line volt age during the surge and the programmed gate voltage. table 5. parameters related to the positive suppressor symbol parameter test conditions min. max. unit i gp positive gate trigger current v gp/gnd = 60 v, measured at 50 hz 5 ma v dgl+ dynamic switching voltage gn / line (1) v gp/gnd = 60 v v 10/700 s 1.2/50 s 2 kv 2 kv r p = 25 r p = 25 i pp = 30 a i pp = 30 a 8 20 1. the v dgl value is the difference between the peak line volt age during the surge and the programmed gate voltage. table 6. parameters related to line/gnd symbol parameter test conditions min. max. unit i r reverse leakage current t j = 25 c t j = 25 c v line = +120 v v line = -120 v v gp/line = +1 v v gn/line = -1 v 5 5 a c off capacitance line/gnd v r = -3 v, f =1 mhz, v gp = 60 v, v gn = -60 v 60 pf table 7. recommended gate capacitance symbol component min. typ. max. unit c g gate decoupling capacitance 100 220 nf
characteristics lcp12 4/9 doc id 17500 rev 1 figure 4. relative variation of holding current versus junction temperature figure 5. maximum non repetitive surge peak on state current versus overload duration figure 6. capacitance versus reverse applied voltage (typical values) with v gn = -90 v and v gp = +90 v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 -40 -20 0 20 40 60 80 100 120 i h [t j ]/i h [t j =25 c] t (c) 0 2 4 6 8 10 12 14 16 18 20 0.01 0.1 1 10 100 1000 f = 50 hz t j initial=25 c t(s) i tsm (a) 20 40 60 80 100 0 10 20 30 40 50 60 70 vline (v) c (pf) line + line -
lcp12 technical information doc id 17500 rev 1 5/9 2 technical information figure 7. lcp12 concept behavior. figure 7 shows the classical protection circuit using the lcp12 crowbar concept. this topology has been developped to protect the new two-battery voltage slics. it allows both positive and negative firing thresholds to be programmed. the lcp12 has two gates (gn and gp). gn is biased to negative battery voltage -v bat , while gp is biased to the positive battery voltage +v b . when a negative surge occurs on one wire (l1 for example), a current i gn flows through the base of the transistor t1 and then injects a current in the gate of the thyristor th1 which fires. all the surge current flows through the ground. after the surge, when the current flowing through th1 becomes less negative than the negative holding current i h- , th1 switches off. this holding current i h- is temperature dependant as per figure 4 when a positive surge occurs on one wire (l1 for example), a current igp flows through the base of the transistor t2 and then injects a current in the gate of the thyristor th2 which fires. all the surge current flows through the ground. after the surge, when the current flowing through th2 becomes less positive than the positive holding current ih+, th2 switches off. this holding current i h+ , typically 20 ma at 25 c, is temperature dependant and the same figure 4 also applies. the capacitors cn and cp are used to speed up the crowbar structure firing during the fast rise or fall edges. this allows to minimize the dynamical breakover voltage at the slic tip and ring inputs during fast surges. please not e that these capacitors are generally available around the slic. to be efficient they have to be as close as possible to the lcp12-150b1 gate pins (gn and gp) and to the reference ground track (or plan). the optimized value for cn and cp is 220 nf. cp gn tip ring gp gnd -vbat +vb cn rs1 rs2 l 1 l 2 gnd v tip th1 th2 t1 t2 ign igp v ring
technical information lcp12 6/9 doc id 17500 rev 1 the series resistors rs1 and rs2 shown in figure 7 represent the fuse resistors or the ptcs which are needed to withstand the power contact or the power induction tests imposed by the country standards. taking this factor into account, the actual lightning surge current flowing through the lcp12-150b1 is equal to : i surge = vsurge / (rg + rs) with v surge = peak surge voltage imposed by the standard. rg = series resistor of the surge generator rs = series resistor of the line card (e.g. ptc) for a line card with 50 of series resistors which has to be qualified under bellcore 1000 v 10/1000 s surge, the present current through the lcp12 is equal to: i surge = 1000 / (10 + 50) = 17 a the lcp12-150b1 topology is particularly optimized for the new telecom applications such as fiber in the loop, wll systems, and decentralized central office, for example. figure 8. protection of slic with positive and negative battery voltages. figure 8 shows the classical protection topology for slic using both positive and negative battery voltages. with such a topology the slic is protected against surge over +v b and lower than -v bat . in this case, +v b can be programmed up to +120 v while -v bat can be programmed down to -120 v. gn gp gnd tip ring -vbat +vb lcp12 220nf slic rs (*) rs (*) line line card tip ring 220nf rs (*) = ptc or resistor fuse
lcp12 package information doc id 17500 rev 1 7/9 3 package information epoxy meets ul94, v0 lead-free package in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 9. so-8 wide footprint measurements in mm (inches) table 8. so-8 wide dimensions ref. dimensions millimeters inches min. typ. max. min. typ. max. a2.500.099 a1 0.00 0.25 0.000 0.010 a2 1.51 2.00 0.059 0.079 b 0.35 0.40 0.51 0.013 0.016 0.020 c 0.10 0.20 0.35 0.003 0.008 0.014 d6.050.239 e 5.02 6.22 0.197 0.245 e1 7.62 8.89 0.30 0.35 e 1.27 0.05 k0 100 10 l 0.50 0.80 0.019 0.032 l k d a1 e1 a a2 b 8 4 1 5 e c e 4.33 (0.170) 1.27 (0.050) 0.52 (0.020) 8.38 (0.330) 5.78 (0.228)
ordering information lcp12 8/9 doc id 17500 rev 1 4 ordering information 5 revision history table 9. ordering information order code marking package weight base qty delivery mode LCP12-150B1RL lcp12 so-8 wide 0.13g 1500 tape and reel table 10. document revision history date revision changes 14-may-2010 1 initial release.
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